ARM, RISC-V, and AI
Three questions on the ARM vs. RISC-V battle — what RISC-V actually has going for it in the AI era, why ARM is now making its own SoC, and where RISC-V still has ground to cover.
Shibo Chen is a Senior Architect at Tenstorrent. He works on chiplet-based AI/ML accelerator systems, with a focus on NoC and D2D interconnect architecture and memory systems. He received his PhD and Bachelor’s degree from the University of Michigan.
PhD in Computer Science and Engineering
University of Michigan, Ann Arbor, MI
Graduate Certificate in Innovation & Entrepreneurship
University of Michigan, Ann Arbor, MI
BSc in Computer Science with High Distinction
University of Michigan, Ann Arbor, MI
Technical notes, updates, and thoughts.
Three questions on the ARM vs. RISC-V battle — what RISC-V actually has going for it in the AI era, why ARM is now making its own SoC, and where RISC-V still has ground to cover.
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